AnalogX Accelerates Time-to-Market with Diakopto’s ParagonX™ Debugging Platform and Methodology
ParagonX helps improve design quality and productivity for AnalogX’s ultra low-power chiplet and chip interconnects
San Jose, CA. 30 June 2021
Diakopto announced today that AnalogX has adopted ParagonXTM to dramatically speed up the development of their industry-leading AXLinkIO technology for chip-to-chip and die-to-die interconnects in process technologies ranging from 22nm to 6nm. AnalogX is a leading provider of high-end, ultra-low power SerDes IPs that drive revolutionary SoC designs for high-bandwidth applications.
ParagonX offers powerful integrated circuits (IC) analysis, debugging and optimization capabilities that enable AnalogX to push the limits of process technology to enhance the performance, power efficiency, robustness and reliability of their interconnect solutions. By providing actionable insights to quickly and easily pinpoint bottlenecks and root causes, ParagonX helps AnalogX engineers overcome the growing challenges of layout parasitics in modern FinFET processes.
Robert Wang, Co-founder and CEO of AnalogX commented, “ParagonX is a must-have for any company designing high-speed, high-precision or low-power ICs, especially in advanced manufacturing technologies. The semiconductor industry has shifted to a new era where advances in design approach, tools and methodology are needed.” He added, “ParagonX is an innovative and extremely user-friendly EDA tool with virtually no learning curve for our engineers. This helps us to optimize and enhance our designs much quicker and more reliably, leading to faster customer adoption and time-to-market for us.”
ParagonX offers a new methodology that treats parasitics as a first-order design parameter. It is orders of magnitude faster than other EDA solutions, and offers deep insight to help engineers quickly find the few critical parasitic elements (out of thousands, millions, or billions) that are responsible for bottlenecks, choke points and weak areas. This reduces parasitics-related IC debugging and optimization time from days or weeks to minutes or hours, which is especially valuable during the tapeout phase.
Maxim Ershov, Diakopto co-founder, CEO and CTO commented, “We are excited to welcome AnalogX to our global family of ParagonX users, and we are pleased to be working with such an innovative team.” He added, “ParagonX is becoming the industry’s solution of choice for parasitics-related IC design and debugging.”
ParagonX features a robust set of tools for rapid electrical, capacitive, structural, connectivity and net-matching analysis and visualization. Information showing the most and least critical areas to be fixed are highlighted on the circuit layout, enabling designers to see where trade-offs can be made to optimize power, performance, and area.
About Diakopto Inc.
Diakopto develops out-of-the-box analysis, visualization, and optimization tools for complex IC designs, with the primary focus on layout parasitics. We empower IC design, layout, and CAD engineers at over 30 industry-leading companies to quickly find and resolve design problems, increase productivity, and accelerate time-to-market. Our software platform and methodology are designed to deliver easy-to-use, intuitive, and fast functionalities, producing clear, visual, and actionable results. Diakopto is headquartered in San Jose, CA. www.diakopto.com
AnalogX Inc. develops ultra-low power connectivity IP solutions to connect chips and chiplets. With product available across multiple foundries and technology nodes, AnalogX’s mission is to enable high-end, mixed-signal IPs that drive revolutionary SoC designs for high-bandwidth applications that range from AI to Data Center Computing. AnalogX is headquartered in Toronto, Canada. Visit http://www.analogx.io
Diakopto and ParagonX are trademarks owned by Diakopto Inc. All other trademarks are owned by their respective companies.